Conversion of analog signal into i and q digital signals with enhanced image rejection

ABSTRACT

A system utilizing bandpass sampling for converting an analog input signal A·sin ((ω o  +ω s )t+φ)) into (I) in-phase and a (Q) quadrature-phase digital signals for digital signal processing, in which image rejection is enhanced. ω s  is the baseband frequency, ω o  is the IF center frequency, and φ is the phase of the analog input signal. A sequence of digital signal samples obtained by bandpass sampling is processed to derive either the I digital signal or the Q digital signal as a first digital output signal from a first series of alternate samples and to derive the other of the I and Q digital signals as a second digital output signal by computing the average of the absolute values of alternate samples that immediately precede and follow the samples of the first series. In accordance with this processing scheme, there is no phase error, but instead an amplitude error in each I/Q pair equal to the value of cos ω s  τ; and the image rejection becomes: ##EQU1## For an UHF receiver with 25 KHz wide channels, the maximum baseband frequency is 12.5 KHz. When sampled at f=4 MHz, the image rejection is 80 dB.

BACKGROUND OF THE INVENTION

The present invention generally pertains to electronic communicationsand is particularly directed to improving image rejection in a systemfor converting an analog signal into (I) in-phase and a (Q)quadrature-phase digital signals for digital signal processing.

A common prior art method of converting a received analog signal fordigital processing is to split the received analog signal into anin-phase (I) component and a quadrature-phase (Q) component and toseparately convert these two components into digital signals. A typicalprior art system for accomplishing such conversion is described withreference to FIG. 1. This prior art system includes a first mixer 10, asecond mixer 12, a phase shifter 14, a frequency generator 16, a firstfilter 18, a second filter 20, a first amplifier 22, a second amplifier24, a first A/D converter 26 and a second A/D converter 28. This systemconverts a high frequency analog input signal A·sin ((ω_(o) +ω_(s))t+φ))received at terminal 30 into baseband signals A·M·sin (ω_(s) t+φ) online 32 to provide the I component, and A·N·cos (ω_(s) t+φ) on line 34to provide the Q component.

ω_(s) is the baseband frequency.

ω_(o) is the IF center frequency.

φ is phase of the input signal.

M is the gain of the I channel 10, 18, 22.

N is the gain of the Q channel 12, 20, 24.

The I and Q components on lines 32 and 34 are repeatedly sampled by therespective A/D converters 26 and 28 simultaneously in response to aclock signal on line 36 to provide an I digital signal at outputterminal 38 and a Q digital signal at output terminal 40. The obtainedbinary values for the I and Q digital signals represent the basebandsignal vector at the instant of sampling, and repeated sampling by A/Dconversion provides an accurate representation of the basebandcomponents on lines 32 and 24, including the information contained inthe modulation of the input signal. There is no restriction on the kindof modulation, such as AM, FM, PM, BPSK, QPSK, etc.

The accuracy of this conversion is limited in practical applications dueto unavoidable I/Q gain imbalance (i.e. N/M not being equal to 1 andphase errors (e.sub.φ) due to the I and Q signals not being offset byexactly ninety degrees from each other. These errors cause generation ofa baseband image signal at -ω_(s) (where ω_(s) is the baseband signalfrequency). Although the image signal is at a lower level than thebaseband signals, the level is too high for many applications. For theimage signal produced in the prior art system of FIG. 1, the imagerejection (IR) with respect to the baseband signal is: ##EQU2##

For typical achievable imbalances of ##EQU3## and a phase error ofe.sub.φ =3 degrees, the image rejection is 24 dB.

Another prior art method of converting an analog input signal fordigital processing is to bandpass sample the analog input signal A·sin((ω_(o) +ω_(s))t+φ)) at a sampling rate of f=1/τ to provide a sequenceof digital signal samples:

    S.sub.0 =A·sin φ,

    S.sub.1 =A·cos (ω.sub.s τ+φ),

    S.sub.2 =-A·sin (ω.sub.s ·2τ+φ),

    S.sub.3 =-A·cos (ω.sub.s ·3τ+φ),

    S.sub.4 =A·sin (ω.sub.s ·4τ+φ),

    S.sub.5 =A·cos (ω.sub.s ·5τ+φ),

    S.sub.6 =-A·sin (ω.sub.s ·6τ+φ), . . . ;

wherein ω_(s) is the baseband frequency, ω_(o) is the IF centerfrequency, and φ is the phase of the input signal. These digital signalsamples are processed to provide a sequence of in-phase digital signals,I₁, I₂, I₃ and a sequence of quadrature-phase digital signals, Q₁, Q₂,Q₃.

Advantages of the bandpass sampling technique are that only one A/Dconverter is required and that there is no balance or trackingrequirements for the different parts of the circuitry.

The choices of the sampling frequencies f are:

f=4 f_(o) /(4 m+2 a-1), wherein m is 0, 1, 2, . . . ; and a is either 0or 1. This provides samples that are 90 degrees apart for the IF centerfrequency ω_(o). However, frequencies that are offset from the IF centerfrequency have a phase error e.sub.φ) equal to ω_(s) τ. With ω_(s) τ=thebaseband frequency=the offset frequency, the rejection is a function ofthe baseband frequency ω_(s), and thereby becomes: ##EQU4##

Although this is equivalent to the I/Q split model of FIG. 1, with nogain imbalance, (i.e. N/M=1) and the phase error, e.sub.φ =ωτ, thisprior art bandpass sampling technique provides a significant improvementover the prior art system of FIG. 1 by almost doubling the dB value ofthe image rejection.

For an UHF receiver with 25 KHz wide channels, the maximum basebandfrequency is 12.5 KHz. When sampled at f=4 MHz, the image rejection is40 dB.

For some demanding applications, however, the image rejection must bemuch greater.

SUMMARY OF THE INVENTION

The present invention provides an system utilizing bandpass sampling forconverting an analog signal into (I) in-phase and a (Q) quadrature-phasedigital signals for digital signal processing, in which image rejectionis improved.

In the system of the present invention, a sequence of digital signalsamples obtained by bandpass sampling is processed to derive either theI digital signal or the Q digital signal as a first digital outputsignal from a first series of alternate samples and to derive the otherof the I and Q digital signals as a second digital output signal bycomputing the average of the absolute values of alternate samples thatimmediately precede and follow the samples of the first series, with thesign depending on the sampling mode (i.e. whether a=0 or a=1).

Accordingly, in one embodiment the derived sequence of in-phase digitalsignals, I₁, I₂, I₃, is

    I.sub.1 =S.sub.1, I.sub.2 =-S.sub.3, and I.sub.3 =S.sub.5 ;

and the derived sequence of quadrature-phase digital signals, Q₁, Q₂,Q₃, is ##EQU5##

In an alternative embodiment the derived sequence of in-phase digitalsignals, I₁, I₂, I₃, is ##EQU6## and the derived sequence ofquadrature-phase digital signals, Q₁, Q₂, Q₃, is

    Q.sub.1 =S.sub.1, Q.sub.2 =-S.sub.3, and Q.sub.3 =S.sub.5.

By processing the samples in accordance with the present invention,there is no phase error, but instead an amplitude error in each I/Q pairequal to the value of cos ω_(s) τ. The resulting image rejection is

In accordance with this processing scheme, image rejection becomes:##EQU7##

Although this is equivalent to the I/Q split in the prior art system ofFIG. 1 with Φ=0 and N/M=cos (ω_(s) τ), the present invention provides adramatic improvement over the prior art systems.

For an UHF receiver with 25 KHz wide channels, the maximum basebandfrequency is 12.5 KHz. When sampled at f=4 MHz, the image rejection is80 dB.

BRIEF DESCRIPTION OF THE DRAWING

FIG. 1 is a diagram of a prior art system for converting an analogsignal into (I) in-phase and a (Q) quadrature-phase digital signals.

FIG. 2 is a diagram of a system according to both the prior art and thepresent invention that uses bandpass sampling for converting an analogsignal into (I) in-phase and a (Q) quadrature-phase digital signals.

FIG. 3 is a diagram illustrating a system according to a preferredembodiment of the present invention for processing digital signalsamples obtained by bandpass sampling.

DESCRIPTION OF THE PREFERRED EMBODIMENT

Referring to FIG. 2, the system of the present invention includes a D/Aconverter 42 and a digital signal processor 44.

The D/A converter converts a high frequency analog input signal A·sin((ω_(o) +ω_(s))t+φ)) received at terminal 46 into a sequence of digitalsignal samples S_(i) on line 48 at a sampling rate of f=1/τ, asdetermined by the clock signal provided on line 50.

The sequence of digital signal samples S_(i) obtained by this samplingprocess is:

    S.sub.0 =A·sin φ,

    S.sub.1 =A·cos (ω.sub.s τ+φ),

    S.sub.2 =-A·sin (ω.sub.s ·2τ+φ),

    S.sub.3 =-A·cos (ω.sub.s ·3τ+φ),

    S.sub.4 =A·sin (ω.sub.s ·4τ+φ),

    S.sub.5 =A·cos (ω.sub.s ·5τ+φ),

    S.sub.6 =-A·sin (ω.sub.s ·6τ+φ), . . . ;

The processor 44 processes the sequence S_(i) of digital signal sampleson line 48 to provide a sequence of in-phase digital signals I₁, I₂, I₃at output terminal 52, and a sequence of quadrature-phase digitalsignals Q₁, Q₂, Q₃ at output terminal 54.

In this preferred embodiment of the present invention, the processor 44processes the digital signal samples S_(i) on line 48 to provide thefollowing sequences of the in-phase digital signals, I₁, I₂, I₃ and thequadrature-phase digital signals Q₁, Q₂, Q₃ :

    I.sub.1 =S.sub.1, I.sub.2 =-S.sub.3, and I.sub.3 =S.sub.5 ;

and ##EQU8##

A system by which the processor 44 implements the foregoing processingscheme is illustrated in FIG. 3. This system includes a first register56, a second register 58, a third register 60, a subtraction unit 62, adivide-by-two unit 64, a first sign-reversal unit 66, a second signreversal unit 68, an I-channel switch 70 and a Q-channel switch 72.

The three registers 56, 58 and 60 are connected in series with eachother such that when digital signal sample S₀ is provided from theoutput of the third register 60, digital signal sample S₁ is providedfrom the output of the second register 58, and digital signal sample S₂is provided from the output of the first register 56, and so forth asthe digital signal samples are sequentially taken and processed. Thesubstraction unit 62 subtracts the value "b" of the output provided bythe third register 60 from the value "a" of the output provided by thefirst register 56 to provide a difference value that is divided in halfby the divide-by-two unit 64. The output of the second register 58 isalso provided to both the first sign-reversal unit 66 and the "z"terminal of the I-channel switch 70. The output of the firstsign-reversal unit 66 is provided to the "x" terminal of the I-channelswitch 70. The output of the divide-by-two unit 64 is provided to boththe second sign-reversal unit 68 and the "z" terminal of the Q-channelswitch 72. The output of the second sign-reversal unit 68 is provided tothe "x" terminal of the Q-channel switch 72. The I-channel switch 70 andthe Q-channel switch 72 are both operated in response to the same clocksignal as that which clocks the A/D converter 42. The I-channel switch70 and the Q-channel switch 72 are both operated to connect theirrespective output terminals 52, 54 to one of their respective switchterminals x, y and z in a sequence of x-y-z-y-x, and so forth.

I claim:
 1. A system for converting an analog signal into (I) in-phaseand a (Q) quadrature-phase digital signals, comprisingmeans forconverting an analog input signal A·sin ((ω_(o) +ω_(s))t+φ)) at asampling rate of f=1/τ=4 f_(o) /(4 m+2 a-1), wherein m is 0, 1, 2, . . .; and a is either 0 or 1, to provide a sequence of digital signalsamples:

    S.sub.0 =A·sin φ,

    S.sub.1 =A·cos (ω.sub.s τ+φ),

    S.sub.2 =-A·sin (ω.sub.s ·2τ+φ),

    S.sub.3 =-A·cos (ω.sub.s ·3τ+φ),

    S.sub.4 =A·sin (ω.sub.s ·4τ+φ),

    S.sub.5 =A·cos (ω.sub.s ·5τ+φ),

    S.sub.6 =-A·sin (ω.sub.s ·6τ+φ), . . . ;

wherein ω_(s) is the baseband frequency, ω_(o) is the IF centerfrequency, and φ is the phase of the analog input signal; and means forprocessing said sequence of digital signal samples to derive either an Idigital signal or a Q digital signal as a first digital output signalfrom a first series of alternate samples and to derive the other of theI and Q digital signals as a second digital output signal by computingthe average of the absolute values of alternate samples that immediatelyprecede and follow the samples of the first series, with the signdepending on the sampling mode (i.e. whether a=0 or a=1).
 2. A systemaccording to claim 1, wherein the processing means are adapted forprocessing said digital signal samples to provide a sequence of in-phasedigital signals,

    I.sub.1 =S.sub.1, I.sub.2 =-S.sub.3, and I.sub.3 =S.sub.5 ;

and a sequence of quadrature-phase digital signals, ##EQU9##
 3. A systemaccording to claim 1, wherein the processing means are adapted forprocessing said digital signal samples to provide a sequence of in-phasedigital signals, ##EQU10## and a sequence of quadrature-phase digitalsignals, Q₁, Q₂, Q₃, is

    Q.sub.1 =S.sub.1, Q.sub.2 =-S.sub.3, and Q.sub.3 =S.sub.5.